1. Field of the Invention
The present invention relates to a delay control circuit device, and a semiconductor integrated circuit device and a delay control method using the delay control circuit device.
2. Description of the Related Art
As semiconductor integrated circuits become faster, skew between clocks or between a clock and data has become a problem. Skew between clocks or between a clock and data could reduce the operating frequency or cause circuit malfunction due to data passing error or the like. It is thus necessary to reduce skew.
As a method for reducing skew, a method has been proposed for providing signal wiring with a delay control circuit to change the delay time in a programmable way (U.S. Pat. No. 6,192,092). In this technology, a plurality of drive circuits with various sizes of transistors are provided and the size of transistor to drive signal wiring can be selected by selecting which drive circuit will drive the signal wiring, thereby controlling the delay of the signal wiring in several tens of picoseconds.
As mentioned hereabove, skew between clocks or between a clock and data could reduce the operating frequency or cause circuit malfunction due to data passing error or the like, so that it is necessary to provide signal wiring with a delay control circuit to change the delay time in a programmable way, in order to reduce skew. Introduction of speeding up of semiconductor integrated circuits will be accompanied by a problem of skew in several picoseconds.
In the configuration of a related art delay control circuit, it is possible to change the delay time in several hundreds to several tens of picoseconds, but it is extremely difficult to change the delay time in units of very small time order of several picoseconds. Such an attempt will require a drive circuit having a very large number of transistors of various sizes thus considerably increasing the circuit scale.